28609262 Chameleon Chips Presentation

8/8/2019 28609262 Chameleon Chips Presentation

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Chameleon Chip

Submitted by:-

Name:Santosh Kumar Biswal

Reg. No.:0701106221

Branch:Computer Science &

Engineering


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Agenda

1.Introduction2.Multifunction Implementation

3.Architecture

4.Embedded Processor System

5.Reconfigurable Processing Fabric

6.Programmable I/O7.Technologies Used In Chip

8.Design Process

9.Comparison With Other Technologies

10.Advantages

11.Disadvantages

12.Applications

13.Conclusion


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A chameleon processor is a reconfigurable microprocessor with

erasable hardware that can rewire itself dynamically.

.

While reconfiguring the chip, the connections inside the functional

blocks and the connections in between the functional blocks are

changing,

It takes just 20 microseconds to reconfigure the entire processing

array.

That means when a particular software is loaded the

present hardware design is erased and a new hardware design is

generated by making a particular number of connections active while

making others idle.

1.Introduction


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2.Multifunction Implementation

In a conventional ASIC , multiple algorithms are implemented as

separate hardware modules. Four algorithms would divide the chip

into four functional areas.

With Reconfigurable Technology, the four algorithms are loaded

into the entire reconfigurable Fabric one at a time.

So finally the result is: much higher performance, lower cost and

lower power consumption


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Machine design supposes that some pins are considered as the

configuration inputs and another as data or control inputs and

outputs.

A new chip must inside determine the set of the function blocks

(FB), which are used to construct the circuit, rules of their

interconnections and ways of the input/output connections.

The most important parts are the logic circuits, which configure

function blocks according to data in the configuration memory.

The various possible connections between functional blocks are

encoded to bits known as Configuration bits. Resulting

configuration stream is downloaded into configuration memory

through configuration inputs.

Thus, a new Reconfigurable machine is

established.

3.Architecture


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4.Embedded Processor Systemtem

32-bit ARC Processor

32-bit PCI Controller

64-bit Memory Controller

DMA Subsystem

Configuration Subsystem


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5.Reconfigurable Processing Fabric(RPF)

The Fabric provides unmatched algorithmic computation power toChameleon Chip. It consists of 84,32-bit Data path Units and 24, 1624-

bit Multipliers,Operating at 125Mhz, they provide up to 3,000 16-bit

Million Multiply-Accumulates Per Second and 24,000 16-bit Million

Operations Per Second.

The fabric is divided into Slices, the basic unit of reconfiguration.

The CS2112 has 4 Slices with 3 Tiles in each. Each tile can be

reconfigured at runtime

Tiles contain : Datapath Units

Local Store Memories

16x24 multipliers

Control Logic Unit

Continued.


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The high-performance 32bit Data path Unit (DPU): The Tile includes seven Data path

Units. The DPU is a data processing module that directly supports all C and Verilog

operations.


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Data Path Unit(DPU))


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7.Technologies Used In Chip

1. eCONFIGURABLETECHNOLOGY:

eConfigurable Technology is used for instantaneous reconfiguration.

With eConfigurable Technology; the four algorithms are loaded into the entire

reconfigurable processing Fabric one at a time.

2. C~SIDE Development Tools :

With this software development tool,Chameleon Systems are providing the ability

for the customers to do the programming themselves thus keeping the secrecy of

their algorithms.

The Chameleon Systems Integrated Development Environment (C~SIDE) is a

complete toolkit for designing, debugging and verifying RCP designs.

C~Side uses a combined C language and Verilog flow to map algorithms into the

chips reconfigurable processing fabric (RPF).


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8.Design Process


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Comparison

Advantages:

very high

performance and

efficient

Disadvantages:not flexible (cant

be altered after

fabrication)

expensive

Hardware

(Application SpecificIntegrated Circuits)

Software-programmed

processors

Advantages:

software is very

flexible to change

Disadvantages:

performance cansuffer if clock is not

fast

fixed instruction set

by hardware

Chameleon

computing

Advantages:

fills the gap

between hardware

and software

much higherperformance than

software

higher level of

flexibility than

hardware


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10.Advantages

Early and fast design

Reducing development cost

Can more quickly adapt to new requirements and standards

Increasing bandwidth

Reducing power

Reducing manufacturing cost.


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11.Disadvantages

Inertia Engineers slow to change .Inertia is the worst

problem facing reconfigurable computing

RCP designs requires comprehensive set of tools & skilled

designer


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12.Applications

Wireless Base stations

Wireless Local Loop (WLL)

Software-Defined Radio (SDR)


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13.Conclusion

These new chips called chameleon chips are able to rewire themselves on the

fly to create the exact hardware needed to run a piece of software at the utmost

speed.

They will reduce the prices of the gadgets of the information age.


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www.chameleon systems.com

www.thinkdigit.com

www.ieee.org

www.entecollege.com

www.iec.org

www.quicksilvertechnologies.com

www.xilinx.com

REFERENCES

WEBSITES:-


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28609262 Chameleon Chips Presentation

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